The posts on this blog are arranged in a fashion, starting from the latest going down to the oldest

Saturday, November 8, 2008

Electronics and Telecommunication Sem III (Revised) Timetable

4th December 2008 - Electronic Devices And Circuits.

12th December2008 - Digital Logic Design

17th December 2008 - Electronic Instrumentation

3rd January 2009 - Electrical Networks

9th January 2009 - Applied Mathematics III

Timing: 2:30 pm to 5:30 pm

All the best folks!!!

EI viva questions

Here's a great post for all of you. Given below are two jpeg images containing EI viva questions. I got this from one of my friends from Jondhale college, Dombivli. Enjoy!!!!!!

Download

Link 1

Link 2

Monday, November 3, 2008

Viva and Practical Time-Table

Hi friends,
Click on the link below to download the time-table for, SEM III vivas and practicals (for students of Y.T.I.E.T.)


Sunday, November 2, 2008

Saturday, September 20, 2008

EN Practical Write-ups

Hello friends,
In this post you will find write ups of practicals of Electrical Networks (EN) conducted at Y.T.I.E.T.
So keep checking out this post for more write-ups.

Click on the titles to download :

Experiment 1: To verify Thevenin's And Norton's Theorem.
[Contributed by myself]

Experiment 2: To construct and verify voltage dependent current source.
[Contributed by myself]

Experiment 3: To construct and verify current dependent current source.
[Contributed by myself]


Experiment 4: To obtain h parameter
[Contributed by myself]

Experiment 5: To obtain z parameter
[Contributed by myself]

Experiment 6: To find time constant of RC circuit
[Contributed by myself]

Experiment 7: To find time constant of RL circuit
[Contributed by myself]

Experiment 8: To plot the bode plot of given electrical circuit and to verify it
[Contributed by myself]


Don't forget to leave your comments.


Friday, September 5, 2008

DLD practical write-ups

Hi friends,
This is Adarsh here.
1.Troubled with the completion of your journals?
2.Can't find write-ups?
3.Confused about he format to write-down your journal?

Don't worry. This won't go on any longer.
From now on I am going to post the links to the write-ups of DLD practicals conducted in our college (Y.T.I.E.T).
So keep checking this post for newer links.

Click on the titles to download

Experiment 1.To study logic gates

[Contributed by myself (Adarsh)]


Experiment 2.Implementation of EX-OR and EX-NOR using NAND and NOR gates

[Contributed by Viraj Gupte]

Experiment 3. Study of half adder , full adder, half subtractor, full subtractor, BCD adder
[Contributed by myself (Adarsh)]

Experiment 4.Implementations of logic equations using MUX and DEMUX
[Contributed by myself (Adarsh)]

Experiment 5.To study operation of decoder driver IC 7447 and to verify the truth table
[Contributed by myself (Adarsh)]

Experiment 6. Conversion of JK flip-flop to T and D flip-flop
[Contributed by myself (Adarsh)]

Experiment 7.To design and implement MOD 4 asynchronous counter using JK flip-
[Contributed by myself (Adarsh)]

Experiment 8.To study parity bit checker / generator
[Contributed by myself (Adarsh)]


Comments awaited.

Monday, July 28, 2008

EXTC Sem-III & Sem-IV Syllabus

Hello friends,

I know that the mumbai university's website (www.mu.ac.in) is definitely not a site where engineering students can find their respective syllabi.


Anyways Chillax. I can provide you the syllabus provided you give me honest comments.


Take care.



EXTC Sem-III Time-Table

Hi guys and girls,

Here's the download link to the time-table for Sem -III students (EXTC branch) of Y.T.I.E.T.


Please post your honest comments.


Saturday, July 19, 2008

Welcome!

Hello friends!

I have started this blog for the EXTC students of mumbai university.
The blog is specially dedicated to the students of Y.T.I.E.T.

I will try my best to satisfy all your requirements over here.
So please do not hesitate to put forward your requests.
Looking forward towards a big response.