The posts on this blog are arranged in a fashion, starting from the latest going down to the oldest

Saturday, September 20, 2008

EN Practical Write-ups

Hello friends,
In this post you will find write ups of practicals of Electrical Networks (EN) conducted at Y.T.I.E.T.
So keep checking out this post for more write-ups.

Click on the titles to download :

Experiment 1: To verify Thevenin's And Norton's Theorem.
[Contributed by myself]

Experiment 2: To construct and verify voltage dependent current source.
[Contributed by myself]

Experiment 3: To construct and verify current dependent current source.
[Contributed by myself]


Experiment 4: To obtain h parameter
[Contributed by myself]

Experiment 5: To obtain z parameter
[Contributed by myself]

Experiment 6: To find time constant of RC circuit
[Contributed by myself]

Experiment 7: To find time constant of RL circuit
[Contributed by myself]

Experiment 8: To plot the bode plot of given electrical circuit and to verify it
[Contributed by myself]


Don't forget to leave your comments.


Friday, September 5, 2008

DLD practical write-ups

Hi friends,
This is Adarsh here.
1.Troubled with the completion of your journals?
2.Can't find write-ups?
3.Confused about he format to write-down your journal?

Don't worry. This won't go on any longer.
From now on I am going to post the links to the write-ups of DLD practicals conducted in our college (Y.T.I.E.T).
So keep checking this post for newer links.

Click on the titles to download

Experiment 1.To study logic gates

[Contributed by myself (Adarsh)]


Experiment 2.Implementation of EX-OR and EX-NOR using NAND and NOR gates

[Contributed by Viraj Gupte]

Experiment 3. Study of half adder , full adder, half subtractor, full subtractor, BCD adder
[Contributed by myself (Adarsh)]

Experiment 4.Implementations of logic equations using MUX and DEMUX
[Contributed by myself (Adarsh)]

Experiment 5.To study operation of decoder driver IC 7447 and to verify the truth table
[Contributed by myself (Adarsh)]

Experiment 6. Conversion of JK flip-flop to T and D flip-flop
[Contributed by myself (Adarsh)]

Experiment 7.To design and implement MOD 4 asynchronous counter using JK flip-
[Contributed by myself (Adarsh)]

Experiment 8.To study parity bit checker / generator
[Contributed by myself (Adarsh)]


Comments awaited.